An Optoelectronic Multi-Terabit CMOS Switch Core for Local Area Networks

نویسندگان

  • Honglin Wu
  • Amir Gourgy
  • Ted H. Szymanski
چکیده

Optoelectronic integrated circuits can support thousands of integrated optical laser diodes and photodetectors bonded to a high-performance CMOS substrate, and can be used in the design of Multi-Terabit optical Local Area Networks. This paper describes the design of an integrated optoelectronic CMOS crossbar switch to interconnect approx. 128 parallel fiber ribbon optical links, each with 12 channels clocked at 2.5 Gigabit/sec, to achieve a Local Area Network (LAN) with an aggregate capacity of 3.84 Terabits/second. A prototype switch core has been designed in 0.18μm CMOS technology. Logic optimization and synthesis was performed using the Synopsis logic optimization tools, and VLSI layout was performed using the Cadence 2002 tools. It is shown that using 0.18μm CMOS technology, a 3.84 Terabit crossbar switch for an optoelectronic LAN occupies approx. 1.78 sq. cm of real estate, and consumes approx. 90 watts of power.

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Terabit optical local area networks for multiprocessing systems.

The design of a scalable optical local area network formultiprocessing systems is described. Each workstation has aparallel-fiber-ribbon optical link to a centralized complementarymetal-oxide silicon (CMOS) switch core, implemented on a singlecompact printed circuit board (PCB). When the Motorola Optobusfiber technology is used, each workstation has a data bandwidth of 6.4Gbits/s to the core. A...

متن کامل

High-speed CMOS switch designs for free-space optoelectronic MIN's

We present the theory, experimental results, and analytical modeling of high-speed CMOS switches, with a 2-D layout, suitable for the implementation of packet-switched free-space optoelectronic Multistage Interconnection Networks (MINs). These switches are fully connected, bi-directional, and scaleable. The first design is a proof of concept of the half-switch, which is a two-to-one multiplexer...

متن کامل

A Terabit Multi-Service Switch With Quality Of Service Support

The Yuni switch architecture, which will be available in silicon later this year, enables a scalable switching platform from multi-gigabits to multi-terabits per second. The solution consists of six custom integrated circuits which utilizes standard CMOS technology, as well as commercially available SRAM’s and high-speed SERDES (serializer/deserializer) chips. The Yuni architecture provides the...

متن کامل

Optimized architecture and design of an output-queued CMOS switch chip

Traditional improvements in packet switch architecture aimed at increasing switch performance in terms of utilization, fairness and QoS. This paper focuses on improving architecture to achieve implementation feasibility of terabit aggregate data rates while maintaining such performance. Terabit class shared-memory switch chips are simple in concept but are a challenge to build due to the memory...

متن کامل

Error and Flow Control Protocols for Terabit Optical Networks

The design of an optical image guide network for distributed multiprocessing is described. The network supports multiple high bandwidth rings between workstations over distances of 10s of meters. Traditionally, error and flow control functions for multiprocessor networks are implemented in custom high speed electronic Application Specific Integrated Circuits (ASICS) which are physically removed...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2003